THE USE OF HYBRID FPGA FOR IMPLEMENTING COMPOSITIONAL CONTROL UNIT WITH IDENTIFICATION OF OUTPUTS
K.N. Efimenko.
A method for reducing the hardware amount in the circuit of compositional microprogram control unit (CMCU) with identification of outputs is proposed oriented on hybrid FPGA technology. The method is based on the use of three sources of codes classes of pseudoequivalent operational linear chains (POLC) and implementing the block of microinstruction addressing with programmable logic arrays. Such approach allows reducing the chip area occupied by the circuit of CMCU. An example of the proposed method application is given. Key words: CMCU with identification of outputs, POLC, hybrid FPGA, logic circuit
